AMD have finally allowed a peak of what will be their next GPU Architecture. Vega has been a long time coming, and we got our first little preview last month during the companies demo of their new RyZen processors.
Sadly the information shared today is very limited, but does show that AMD are working towards something pretty big.
Vega will introduce HDM2 memory with 8GB stacks, and 512GB’s bandwidth per stack. AMD also showcased an image of the GPU during CES which shows the GPU having 2 stacks of HBM2 memory, meaning, we’re liking going to see the first Vega GPU launch with 16GB of HMB2 memory.
AMD are stating that this is their biggest advancement in GPU architecture, and will be the most saleable GPU memory architecture, and feature a High-Band cache/controller;to remove the limitations of GPU memory by storing important information in computer memory, or even your SSD.
Below is the key points shared for the new Vega architecture. Sadly no other information was shared, but AMD did post some marketing videos regarding Vega, and a small demo of it in action running Doom with the Vulkan API@4K.
Let’s just hope more information comes soon.
Vega and Radeon for Gaming
Vega in Action: DOOM® at 4K
Vega for Radeon Pro
Vega for Radeon Instinct
The world’s most advanced GPU memory architecture: The Vega architecture enables a new memory hierarchy for GPUs. This radical new approach comes in the form of a new high-bandwidth cache and its controller. The cache features leading-edge HBM2 technology which is capable of transferring terabytes of data every second, doubling the bandwidth-per-pin over the previous generation HBM technology. HBM2 also enables much greater capacity at less than half the footprint of GDDR5 memory. Vega architecture is optimized for streaming very large datasets and can work with a variety of memory types with up to 512TB of virtual address space.
Next-generation geometry pipeline: Today’s games and professional applications make use of incredibly complex geometry enabled by the extraordinary increase in the resolutions of data acquisition devices. The hundreds of millions of polygons in any given frame have meshes so dense that there are often many polygons being rendered per pixel. Vega’s next-generation geometry pipeline enables the programmer to extract incredible efficiency in processing this complex geometry, while also delivering more than 200% of the throughput-per-clock over previous Radeon architectures. It also features improved load-balancing with an intelligent workload distributor to deliver consistent performance.
Next-generation compute engine: At the core of the Vega architecture is a new, next-generation compute engine built on flexible compute units that can natively process 8-bit, 16-bit, 32-bit or 64-bit operations in each clock cycle. These compute units are optimized to attain significantly higher frequencies than previous generations and their support of variable datatypes makes the architecture highly versatile across workloads.
Advanced pixel engine: The new Vega pixel engine employs a Draw Stream Binning Rasterizer, designed to improve performance and power efficiency. It allows for “fetch once, shade once” of pixels through the use of a smart on-chip bin cache and early culling of pixels invisible in a final scene. Vega’s pixel engine is now a client of the onboard L2 cache, enabling considerable overhead reduction for graphics workloads which perform frequent read-after-write operations.
